The TDCpix, which stands for Time-to-Digital Converter Pixel ASIC, measures the position and arrival time of incident beam particles in the Gigatracker detector of the NA62 experiment. Its design architecture stems from experience with silicon pixel detectors and time measuring devices gained during the construction of LHC detectors. However, the required specifications exceed those of the installed LHC detectors quite substantially, which required an intense and rewarding research phase before successful implementation.

The Gigatracker measures the position of a high number of incident particles - total expected rate of 750 MHz - in three pixel detector planes, each containing a single sensor element instrumented by 10 TDCpix ASICs. The TDCpix ASIC’s pixels are 300 um x 300 um and measure the arrival time of the particles with a precision of better than 200 ps rms. To cope with the high beam density in NA62, the TDCpix ASIC can process up to 130 million particles per second and delivers a continuous, thus triggerless, data stream of 12.8 Gbit per second. With the exception of the pixel size, the required specifications exceed those of the state-of-the art pixel detectors installed in LHC. The LHC pixel detectors have been built with pixel sizes smaller by a factor ~6, but an arrival time measurement accuracy of 25 ns, which corresponds to a factor of 125 times lower precision. The LHC-type pixel ASICs have triggered read-out and a data output rate of 1.28 Gbit/s or lower.

A traditional system implementation with similar timing resolution and channel count requirements would require several electronic racks. The technological progress and research on time-stamping silicon pixel detectors, conducted in the PH department, allowed the implementation of 1800 sensor channels including the amplification stages, time-to-digital-converters and high speed, continuous, triggerless read-out processors in just one single ASIC measuring 12 mm x 20 mm (see photo below). The TDCpix has a sensitive area of 12 mm x 13.5 mm corresponding to 1800 pixels arranged in 40 columns x 45 rows. The hardest challenge was to place high precision time-digital-converters for 1800 pixels inside the TDCpix on the same silicon substrate without creating interference that would degrade the performance of the sensitive circuitries amplifying the small charge provided by the sensors (1-5 fC).

The implementation of the ASIC was done in the PH department by 6 engineers and was one of the largest and most dense ASIC ever made at CERN. The TDCpix design was performed methodically and the final production was preceded by an intensive simulation campaign ensuring correct functionality. These efforts paid off, as the ASIC operates faultlessly and exceeds specifications, negating the need for a costly re-spin. Coupling the TDCpix with the silicon pixel sensor, a timing resolution of better than 200 ps has been achieved. Studies on the sensor technology are ongoing to even improve this resolution. Meanwhile, the thinned TDCpix ASICs coupled to the silicon sensors and micro-channel cooling plates are installed in the Gigatracker detector vacuum vessels of the NA62 beam lines, measuring position and arrival time of the incident particles, already during their first installation.

The design and production of the TDCpix ASIC contributes to the NA62 detector installation but also broadened the horizon in timing measurements and pixel detectors, with the Gigatracker modules being the first compact silicon pixel detectors with better than 200 ps time resolution.