Tag: ESE
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In discussion with Michael Campbell: Unpacking the Medipix/Timepix Revolution
In discussion with Michael Campbell: Unpacking the Medipix/Timepix Revolution The Medipix and Timepix family of hybrid pixel detectors represents one of the most groundbreaking innovations to emerge from CERN’s detector technology. These chips, based on the hybrid pixel technology developed for high-energy physics experiments, have found remarkable applications in diverse fields such as medical imaging,
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DRD7: An R&D Collaboration Pioneering Electronics for Future Particle Detectors
DRD7: An R&D Collaboration Pioneering Electronics for Future Particle Detectors On June 5, 2024, the CERN Research Board approved the DRD7 Collaboration for an initial three-year period. The collaboration will focus on developing and demonstrating new electronic hardware, firmware, and software concepts. Its main goal is to pursue disruptive and transformative innovations, but it will
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Pushing the boundaries of monolithic CMOS sensor technologies
Pushing the boundaries of monolithic CMOS sensor technologies Silicon solid state detectors have been developed over a long time to address the challenges of particle tracking and vertexing. At the LHC, when the machine reaches its full design regime, it collides proton bunches at a rate of 40 million times per second. To capture these
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Asterix in Switzerland
Asterix in Switzerland This episode of the adventures of the winged-helmed Gaul was published in 1970 and foretold what would happen 28 years later, when the CERN microelectronics group (MIC at the time, now the ME section in EP-ESE) welcomed the arrival of its first X-ray irradiation system. The need for such equipment emerged with
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lpGBT ASIC Production
lpGBT ASIC Production What is the lpGBT ASIC ? Figure 1: The lpGBT silicon die on the package substrate (left) and the finished product with overmold (right) The Low Power Giga Bit Transceiver (lpGBT) is a reliable, radiation-tolerant ASIC designed for use in multiple detector systems of the Large Hadron Collider (LHC) (see Figure 1).
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Wafer-level testing of CMS Outer Tracker ASICs
Wafer-level testing of CMS Outer Tracker ASICs The Macro-Pixel ASIC (MPA) and Short-Strip ASIC (SSA) are the new read-out chips used to process particle hit signals of pixel and strip sensors in the upcoming CMS Outer Tracker of the High-Luminosity LHC Upgrade (HL-LHC). The two chips are produced by TSMCs 65nm fabrication process and were
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64 channel picosecond time resolution instrumentation in 25 milligrams of silicon
64 channel picosecond time resolution instrumentation in 25 milligrams of silicon The EP-ESE group has finalized the development of a 64 channel picosecond TDC (Time to Digital Converter) ASIC and 20 thousand pieces have been produced. One of the key challenges for future HEP experiments is the development of very high time resolution detectors and
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HEP responds to the global chips crisis
HEP responds to the global chips crisis Over the past year, semiconductor prices have been surging in Europe as demand increases globally. While this is happening with most products, it's been a larger problem given the role of semiconductors in most electronics, such as consumer electronics (smartphones, laptops, gaming consoles), automotive industry and home appliances.
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Medipix3 reaches the clinic
Medipix3 reaches the clinic In early October, the CERN Medipix Team (EP-ESE-ME) visited the newly installed Medipix3-based spectroscopic CT scanner at the Lausanne University Hospital CHUV, Lausanne. The 3D colour X-ray scanner has been developed in New Zealand by MARS Bioimaging, a spin-out company of the University of Canterbury which is a member of the
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System-on-Chip in Particle Physics Experiments
System-on-Chip in Particle Physics Experiments Many experiments in particle physics use custom-built electronics boards in order to perform event triggering and data readout. For many years now, those electronics boards have been using Field-Programmable Gate Arrays (FPGAs) for processing data. An FPGA is a type of integrated circuit that is reconfigurable and that provides fast